A One-Semester Course in Modeling of VLSI Interconnections

A One-Semester Course in Modeling of VLSI Interconnection

Ashok Goel

In Stock Date: 
12/24/2014
Print Price: 
$49.95
Print ISBN: 
9781606505120
E-book Price: 
$29.95
E-book ISBN: 
9781606505137
Pages: 
180
Binding Type: 
Softcover

Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits.The optimum design of state-of-the-art integrated circuits relies heavily on quantitative understanding of the parasitic capacitances and inductances in the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrate circuits (VSLI). This is because more than 65% of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Modeling of VSLI Interconnections will discuss the mathematical techniques necessary to model the parasitic capacitances, inductances, propagation delays, crosstalk noise and electro migration-induced failure associated with the interconnections in the realistic high-density environment on a chip. This book will be the first of its kind written for a one-semester course on the mathematical modeling of metallic interconnections on a VLSI circuit. In most institutions around the world, this course will be offered at an upper-level undergraduate and beginning graduate level. The book will also be of interest to practicing engineers in the field who are looking for a quick refresher on the subject.

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Ashok K. Goel

Ashok K. Goel

Dr. Ashok K. Goel retired as an associate professor of electrical engineering at Michigan Tech. in 2014. He received his PhD degree in electrical engineering from the Johns Hopkins University in 1987. His research interests are focused in nanotechnology circuit design, high-speed semiconductor devices, and VLSI interconnections. He was sponsored by the National Science Foundation, Michigan Space Grants Consortium, U.S. Department of Defense, Michigan State Research Excellence Fund, U.S. Army Research Office, U.S.